Semiconductor Engineering

MBIST-supported Trim Adjustment to Compensate Thermal Behavior of MRAM

“Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the most promising candidates to replace conventional embedded memory such as Static RAM and Dynamic RAM. However, due to the ...
Design-Reuse

BIST Verification at SoC level

BIST (Built-in self-test) is a feature provided in integrated circuits which allow testing its own operation without need of any external hardware. It is a must have feature in safety critical SoCs.
Design-Reuse

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using Arm MBIST Interface

SAN JOSE, Calif., Nov. 14, 2016 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence ® Modus ™ Test Solution now supports the Arm ® Memory Built-In Self Test (MBIST) ...
EDN

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Through Cadence's support of the ARM MBIST interface, customers can deliver innovative SoC designs to market faster and with better power, performance and area (PPA). For example, the Modus Test ...