But when you start talking about speed, distance, or both, the single ended solutions don’t look so good. To step in and carry the torch we have Differential Signalling. This is the “DS” in ...

[Christer Weinigel] needed to get some measurements of a differential clock signal that ... bandwidth and most off-the-rack probes are single-ended, that is they’re referenced to ground.

The differential logic synthesis is separated in two phases. Starting from a synthesized, single-ended HDL design description, a fully differential ECL netlist is generated using a Verilog netlist ...