Unable to scale horizontally, due to a combination of lithography delays and power constraints, manufacturers are stacking devices vertically. This has become essential as the proliferation of mobile ...

At the recent IEEE Electronic Components and Technology Conference (ECTC), Imec presented a paper on a fine-pitch hybrid wafer-to-wafer bonding technology for heterogeneous integration. Imec described ...

Wafer bonding underpins the integration of diverse semiconductor materials into unified platforms, enabling three-dimensional stacking and heterogeneous assembly of components with disparate lattice ...

Stacking chiplets vertically using short and direct wafer-to-wafer bonds can reduce signal delay to negligible levels, enabling smaller, thinner packages with faster memory/processor speeds and lower ...

A technical paper titled “Multi-tier Die Stacking Through Collective Die-to-Wafer Hybrid bonding” was published by researchers at imec, Brewer Science and SUSS MicroTec Lithography GmbH. “A collective ...

With semiconductors, it’s often things everyone takes for granted that cause the biggest headaches, and that problem is compounded when something fundamental changes — such as bonding two chips ...

A new technical paper titled “Material-Mechanistic Interplay in SiCN Wafer Bonding for 3D Integration” was published by researchers at Yokohama National University, TEL, SK hynix, and University of ...

Ted Tessier, CTO of FCI said, “This innovative and patented solution originated in FCI's Corporate R&D Center in Phoenix, Arizona and was further deployed into volume manufacturing at our Shanghai ...

Palomar Technologies will exhibit in Hall 6 Booth #433 and will showcase an 8000 Wire Bonder and a Royce 650 Universal Bond Tester. The 8000 Wire Bonder is a fully automated thermosonic high-speed, ...